<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2022.2 (64-bit)              -->
<!-- SW Build 3671981 on Fri Oct 14 04:59:54 MDT 2022  -->
<!--                                                         -->
<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.   -->
<!-- Oct 14 2022                                             -->
<!--                                                         -->
<!-- This file is generated by the software with the Tcl write_mem_info command. -->
<!-- Do not edit this file.                                                      -->

<MemInfo Version="1" Minor="9">
  <Processor Endianness="Little" InstPath="microblaze_bd_i/microblaze_0">
    <AddressSpace Name="microblaze_bd_i_microblaze_0.microblaze_bd_i_microblaze_0_local_memory_dlmb_bram_if_cntlr" Begin="0" End="32767">
      <AddressSpaceRange Name="microblaze_bd_i_microblaze_0.microblaze_bd_i_microblaze_0_local_memory_dlmb_bram_if_cntlr" Begin="0" End="32767" CoreMemory_Width="0" MemoryType="RAM_SP" MemoryConfiguration="">
        <BusBlock>
          <BitLane MemType="RAMB36" Placement="X6Y9" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="7" LSB="4"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X6Y10" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="3" LSB="0"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X6Y14" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="15" LSB="12"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X6Y13" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="11" LSB="8"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X6Y6" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="23" LSB="20"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X6Y5" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="19" LSB="16"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X6Y11" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="31" LSB="28"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X6Y7" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="27" LSB="24"/>
            <AddressRange Begin="0" End="8191"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
        </BusBlock>
      </AddressSpaceRange>
    </AddressSpace>
  </Processor>
  <Processor Endianness="Little" InstPath="microblaze_bd_i/ddr4_0/inst/u_ddr4_mem_intfc/u_ddr_cal_riu/mcs0/inst/microblaze_I">
    <AddressSpace Name="microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_microblaze_I.microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_dlmb_cntlr" Begin="0" End="65535">
      <AddressSpaceRange Name="microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_microblaze_I.microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_dlmb_cntlr" Begin="0" End="65535" CoreMemory_Width="0" MemoryType="RAM_SP" MemoryConfiguration="">
        <BusBlock>
          <BitLane MemType="RAMB36" Placement="X2Y24" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="7" LSB="6"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X2Y25" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="5" LSB="4"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X1Y24" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="3" LSB="2"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X1Y22" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="1" LSB="0"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X0Y25" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="15" LSB="14"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X0Y24" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="13" LSB="12"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X1Y26" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="11" LSB="10"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X1Y25" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="9" LSB="8"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X1Y19" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="23" LSB="22"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X2Y19" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="21" LSB="20"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X1Y17" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="19" LSB="18"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X0Y20" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="17" LSB="16"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X2Y21" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="31" LSB="30"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X0Y18" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="29" LSB="28"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X0Y22" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="27" LSB="26"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
          <BitLane MemType="RAMB36" Placement="X1Y18" Read_Width="0" SLR_INDEX="-1">
            <DataWidth MSB="25" LSB="24"/>
            <AddressRange Begin="0" End="16383"/>
            <BitLayout pattern=""/>
            <Parity ON="false" NumBits="0"/>
          </BitLane>
        </BusBlock>
      </AddressSpaceRange>
    </AddressSpace>
  </Processor>
  <Config>
    <Option Name="Part" Val="xcku040-ffva1156-2-i"/>
  </Config>
  <DRC>
    <Rule Name="RDADDRCHANGE" Val="false"/>
  </DRC>
</MemInfo>
