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          "parameters": {
            "POLARITY": [ { "value": "ACTIVE_HIGH", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
            "TYPE": [ { "value": "PROCESSOR", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
            "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
          },
          "port_maps": {
            "RST": [ { "physical_name": "processor_rst" } ]
          }
        },
        "interrupt": {
          "vlnv": "xilinx.com:interface:mbinterrupt:1.0",
          "abstraction_type": "xilinx.com:interface:mbinterrupt_rtl:1.0",
          "mode": "master",
          "parameters": {
            "SENSITIVITY": [ { "value": "LEVEL_HIGH", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
            "LOW_LATENCY": [ { "value": "1", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
          },
          "port_maps": {
            "ACK": [ { "physical_name": "processor_ack" } ],
            "ADDRESS": [ { "physical_name": "interrupt_address" } ],
            "INTERRUPT": [ { "physical_name": "irq" } ]
          }
        },
        "interrupt_input": {
          "vlnv": "xilinx.com:signal:interrupt:1.0",
          "abstraction_type": "xilinx.com:signal:interrupt_rtl:1.0",
          "mode": "slave",
          "parameters": {
            "SENSITIVITY": [ { "value": "LEVEL_HIGH:LEVEL_HIGH:NULL", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
            "PortWidth": [ { "value": "3", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ]
          },
          "port_maps": {
            "INTERRUPT": [ { "physical_name": "intr" } ]
          }
        }
      },
      "memory_maps": {
        "S_AXI": {
          "display_name": "S_AXI_MEM",
          "description": "Memory Map for S_AXI",
          "address_blocks": {
            "Reg": {
              "base_address": "0",
              "range": "4096",
              "display_name": "Reg",
              "description": "Register Block",
              "usage": "register",
              "access": "read-write",
              "registers": {
                "ISR": {
                  "address_offset": "0x0",
                  "size": 3,
                  "display_name": "Interrupt Status Register",
                  "description": "Interrupt Status Register",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x0",
                  "fields": {
                    "INT": {
                      "bit_offset": 0,
                      "bit_width": 3,
                      "display_name": "Active Interrupt Signal",
                      "description": "Interrupt Status Register.\nFor each bit up to number of periperhal interrupts:\n  R - Reads active interrupt signal.\n  W - No effect after MER HIE bit has been set, otherwise writes active interrupt signal.\nFor remaining bits defined by number of software interrupts:\n  R - Reads software interrupt value.\n  W - Writes software interrupt value.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "IPR": {
                  "address_offset": "0x4",
                  "size": 3,
                  "display_name": "Interrupt Pending Register",
                  "description": "Interrupt Pending Register",
                  "is_volatile": true,
                  "access": "read-only",
                  "reset_value": "0x0",
                  "fields": {
                    "INT": {
                      "bit_offset": 0,
                      "bit_width": 3,
                      "display_name": "Pending Interrupt Signal",
                      "description": "Interrupt Pending Register.\nFor each bit:\n  R - Reads logical AND of bits in ISR and IER.\n  W - No effect.\n",
                      "is_volatile": true,
                      "access": "read-only"
                    }
                  }
                },
                "IER": {
                  "address_offset": "0x8",
                  "size": 3,
                  "display_name": "Interrupt Enable Register",
                  "description": "Interrupt Enable Register",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x0",
                  "fields": {
                    "INT": {
                      "bit_offset": 0,
                      "bit_width": 3,
                      "display_name": "Interrupt Enable",
                      "description": "Interrupt Enable Register.\nFor each bit:\n  R - Reads interrupt enable value.\n  W - Writes interrupt enable value.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "IAR": {
                  "address_offset": "0xC",
                  "size": 3,
                  "display_name": "Interrupt Acknowledge Register",
                  "description": "Interrupt Acknowledge Register",
                  "is_volatile": true,
                  "access": "write-only",
                  "reset_value": "0x0",
                  "fields": {
                    "INT": {
                      "bit_offset": 0,
                      "bit_width": 3,
                      "display_name": "Interrupt Acknowledge",
                      "description": "Interrupt Acknowledge Register.\nFor each bit:\n  W - Acknowledge interrupt.\n",
                      "is_volatile": true,
                      "access": "write-only"
                    }
                  }
                },
                "SIE": {
                  "address_offset": "0x10",
                  "size": 3,
                  "display_name": "Set Interrupt Enables",
                  "description": "Set Interrupt Enables",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x0",
                  "fields": {
                    "INT": {
                      "bit_offset": 0,
                      "bit_width": 3,
                      "display_name": "Set Interrupt Enable",
                      "description": "Set Interrupt Enables\nFor each bit:\n  R - Reads active interrupt.\n  W - Writing 1 enables the interrupt, writing 0 has no effect.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "CIE": {
                  "address_offset": "0x14",
                  "size": 3,
                  "display_name": "Clear Interrupt Enables",
                  "description": "Clear Interrupt Enables",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x0",
                  "fields": {
                    "INT": {
                      "bit_offset": 0,
                      "bit_width": 3,
                      "display_name": "Clear Interrupt Enable",
                      "description": "Clear Interrupt Enables\nFor each bit:\n  R - Reads active interrupt.\n  W - Writing 1 disables the interrupt, writing 0 has no effect.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "IVR": {
                  "address_offset": "0x18",
                  "size": 5,
                  "display_name": "Interrupt Vector Register",
                  "description": "Interrupt Vector Register",
                  "is_volatile": true,
                  "access": "read-only",
                  "reset_value": "0x0",
                  "fields": {
                    "IVN": {
                      "bit_offset": 0,
                      "bit_width": 5,
                      "display_name": "Interrupt Vector Number",
                      "description": "Interrupt Vector Number.\n  R - Reads ordinal of highest priority, enabled, active interrupt.\n",
                      "is_volatile": true,
                      "access": "read-only"
                    }
                  }
                },
                "MER": {
                  "address_offset": "0x1C",
                  "size": 2,
                  "display_name": "Master Enable Register",
                  "description": "Master Enable Register",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x0",
                  "fields": {
                    "ME": {
                      "bit_offset": 0,
                      "bit_width": 1,
                      "display_name": "Master IRQ Enable",
                      "description": "Master IRQ Enable.\n  0 - All interrupts disabled.\n  1 - All interrupts can be enabled.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    },
                    "HIE": {
                      "bit_offset": 1,
                      "bit_width": 1,
                      "display_name": "Hardware Interrupt Enable",
                      "description": "Hardware Interrupt Enable.\n  0 - HW interrupts disabled.\n  1 - HW interrupts enabled.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "IMR": {
                  "address_offset": "0x20",
                  "size": 3,
                  "display_name": "Interrupt Mode Register",
                  "description": "Interrupt Mode Register",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x0",
                  "fields": {
                    "INT": {
                      "bit_offset": 0,
                      "bit_width": 3,
                      "display_name": "Interrupt Mode",
                      "description": "Interrupt Mode Register.\nFor each bit:\n  R - Reads interrupt mode.\n  W - Sets interrupt mode, where 0 is normal mode and 1 is fast mode.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "IVAR[0]": {
                  "address_offset": "0x100",
                  "size": 32,
                  "display_name": "Interrupt Vector Address Register 0",
                  "description": "Interrupt Vector Address Register 0",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x000000010",
                  "fields": {
                    "IVA": {
                      "bit_offset": 0,
                      "bit_width": 32,
                      "display_name": "Interrupt Vector Address",
                      "description": "Interrupt vector address of active interrupt 0 with highest priority.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "IVAR[1]": {
                  "address_offset": "0x104",
                  "size": 32,
                  "display_name": "Interrupt Vector Address Register 1",
                  "description": "Interrupt Vector Address Register 1",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x000000010",
                  "fields": {
                    "IVA": {
                      "bit_offset": 0,
                      "bit_width": 32,
                      "display_name": "Interrupt Vector Address",
                      "description": "Interrupt vector address of active interrupt 1 with highest priority.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                },
                "IVAR[2]": {
                  "address_offset": "0x108",
                  "size": 32,
                  "display_name": "Interrupt Vector Address Register 2",
                  "description": "Interrupt Vector Address Register 2",
                  "is_volatile": true,
                  "access": "read-write",
                  "reset_value": "0x000000010",
                  "fields": {
                    "IVA": {
                      "bit_offset": 0,
                      "bit_width": 32,
                      "display_name": "Interrupt Vector Address",
                      "description": "Interrupt vector address of active interrupt 2 with highest priority.\n",
                      "is_volatile": true,
                      "access": "read-write"
                    }
                  }
                }
              }
            }
          }
        }
      }
    }
  }
}