updates
This commit is contained in:
31
pcie_driver/Makefile
Executable file
31
pcie_driver/Makefile
Executable file
@@ -0,0 +1,31 @@
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BINARY := drexpcie_module
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KERNEL := /lib/modules/$(shell uname -r)/build
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ARCH := x86
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C_FLAGS := -Wall
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KMOD_DIR := $(shell pwd)
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TARGET_PATH := /lib/modules/$(shell uname -r)/kernel/drivers/char
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OBJECTS := \
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drexpcie.o \
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drexdma.o \
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drexchar.o \
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ccflags-y += $(C_FLAGS)
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obj-m += $(BINARY).o
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$(BINARY)-y := $(OBJECTS)
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$(BINARY).ko:
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make -C $(KERNEL) M=$(KMOD_DIR) modules
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install:
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cp $(BINARY).ko $(TARGET_PATH)
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depmod -a
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uninstall:
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rm $(TARGET_PATH)/$(BINARY).ko
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depmod -a
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clean:
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make -C $(KERNEL) M=$(KMOD_DIR) clean
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18
pcie_driver/drex.h
Executable file
18
pcie_driver/drex.h
Executable file
@@ -0,0 +1,18 @@
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#ifndef DREX_H_
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#define DREX_H_
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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/* This is a "private" data structure */
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/* You can store there any data that should be passed between driver's functions */
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struct drexpcie_driver_priv {
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struct pci_dev *pdev;
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unsigned long mem_start;
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unsigned long mem_len;
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u8 __iomem *bar0_mem;
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};
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#endif
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292
pcie_driver/drexchar.c
Executable file
292
pcie_driver/drexchar.c
Executable file
@@ -0,0 +1,292 @@
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#include <linux/cdev.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <linux/fs.h>
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#include <linux/iomap.h>
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#include "drexchar.h"
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#include "drexdma.h"
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#define MAX_DEV 16
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static int drexpcie_open(struct inode *inode, struct file *file);
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static int drexpcie_release(struct inode *inode, struct file *file);
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static int drexpcie_mmap(struct file *file, struct vm_area_struct *vma);
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static long drexpcie_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
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static ssize_t drexpcie_read(struct file *file, char __user *buf, size_t count, loff_t *offset);
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static ssize_t drexpcie_write(struct file *file, const char __user *buf, size_t count, loff_t *offset);
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static const struct file_operations drexpcie_fops = {
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.owner = THIS_MODULE,
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.open = drexpcie_open,
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.release = drexpcie_release,
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.mmap = drexpcie_mmap,
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.unlocked_ioctl = drexpcie_ioctl,
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.read = drexpcie_read,
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.write = drexpcie_write
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};
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struct drexpcie_device_data {
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struct device* dev;
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struct cdev cdev;
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uint32_t type;
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uint32_t offset;
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};
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static int dev_major = 0;
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static struct class *drexpcie_class = NULL;
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static struct drexpcie_device_data drexpcie_dev_data[MAX_DEV];
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static struct drexpcie_driver_priv* driv_access = NULL;
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static int drexpcie_uevent(const struct device *dev, struct kobj_uevent_env *env)
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{
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add_uevent_var(env, "DEVMODE=%#o", 0666);
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return 0;
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}
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int drexpcie_chardev_create(struct drexpcie_driver_priv *driv_priv)
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{
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int err, i;
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dev_t dev;
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char device_string[64];
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int pl_count = 0;
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int dma_count = 0;
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driv_access = driv_priv;
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err = alloc_chrdev_region(&dev, 0, MAX_DEV, "drexpcie");
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dev_major = MAJOR(dev);
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// drexpcie_class = class_create(THIS_MODULE, "drexpcie-dev");
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drexpcie_class = class_create("drexpcie-dev");
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drexpcie_class->dev_uevent = drexpcie_uevent;
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for (i = 0; i < MAX_DEV; i++) {
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drexpcie_dev_data[i].type = ioread32(driv_access->bar0_mem+(i*4)*4);
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if (drexpcie_dev_data[i].type == 0x10000) {
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snprintf(device_string,sizeof(device_string),"drexpl%d",pl_count);
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pl_count++;
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}
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else if (drexpcie_dev_data[i].type == 0x20000) {
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snprintf(device_string,sizeof(device_string),"drexdma%d",dma_count);
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dma_count++;
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}
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else {
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drexpcie_dev_data[i].type = 0;
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break;
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}
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// save the offset of the device area;
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drexpcie_dev_data[i].offset = ioread32(driv_access->bar0_mem+(i*4+1)*4);
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cdev_init(&drexpcie_dev_data[i].cdev, &drexpcie_fops);
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drexpcie_dev_data[i].cdev.owner = THIS_MODULE;
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cdev_add(&drexpcie_dev_data[i].cdev, MKDEV(dev_major, i), 1);
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drexpcie_dev_data[i].dev = device_create(drexpcie_class, NULL, MKDEV(dev_major, i), NULL, "%s",device_string);
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}
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return 0;
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}
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int drexpcie_chardev_destroy(void)
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{
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int i;
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for (i = 0; i < MAX_DEV; i++) {
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device_destroy(drexpcie_class, MKDEV(dev_major, i));
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}
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class_unregister(drexpcie_class);
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class_destroy(drexpcie_class);
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unregister_chrdev_region(MKDEV(dev_major, 0), MINORMASK);
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return 0;
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}
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static int drexpcie_open(struct inode *inode, struct file *file)
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{
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struct drexpcie_device_priv* drexpcie_priv;
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unsigned int minor = iminor(inode);
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drexpcie_priv = kzalloc(sizeof(struct drexpcie_device_priv), GFP_KERNEL);
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drexpcie_priv->chnum = minor;
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drexpcie_priv->driv_priv = driv_access;
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// drexpcie_priv->dev = &(drexpcie_dev_data[drexpcie_priv->chnum].pdev->dev);
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drexpcie_priv->type = drexpcie_dev_data[drexpcie_priv->chnum].type;
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drexpcie_priv->base_mem = driv_access->bar0_mem + drexpcie_dev_data[drexpcie_priv->chnum].offset;
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drexpcie_priv->num_bufs = 512;
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drexpcie_priv->num_bytes = 4194304;
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drexpcie_priv->valid_bufs = 0;
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drexpcie_priv->bufPtr = NULL;
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drexpcie_priv->dmaPtr = (dma_addr_t *) NULL;
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file->private_data = drexpcie_priv;
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return 0;
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}
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static int drexpcie_release(struct inode *inode, struct file *file)
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{
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struct drexpcie_device_priv* drexpcie_priv = file->private_data;
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kfree(drexpcie_priv);
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drexpcie_priv = NULL;
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return 0;
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}
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static int drexpcie_mmap(struct file *file, struct vm_area_struct *vma)
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{
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struct drexpcie_device_priv* drexpcie_priv = file->private_data;
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int ret;
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// DMA doesn't support mmap
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if (drexpcie_priv->type == 0x20000) return -EINVAL;
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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ret = io_remap_pfn_range(vma, vma->vm_start, ((unsigned long) drexpcie_priv->driv_priv->mem_start) >> PAGE_SHIFT, vma->vm_end - vma->vm_start, vma->vm_page_prot);
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if (ret != 0) {
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printk(KERN_ERR "Error in calling remap_pfn_range: returned %d\n", ret);
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return -EAGAIN;
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}
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return 0;
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}
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static long drexpcie_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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struct drexpcie_device_priv* drexpcie_priv = file->private_data;
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drexpcie_ioctl_t drexpcie_ioctl;
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// uint32_t temp;
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if (copy_from_user(&drexpcie_ioctl, (drexpcie_ioctl_t *)arg,
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sizeof(drexpcie_ioctl_t))) {
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return -EACCES;
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}
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printk("drexpcie[%d]: Received IOCTL cmd=%d\n", drexpcie_priv->chnum, drexpcie_ioctl.cmd);
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switch (drexpcie_ioctl.cmd) {
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case DREXDMA_DMA_INIT:
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return dma_init(drexpcie_priv);
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break;
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case DREXDMA_DMA_CLEAR:
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return dma_clear(drexpcie_priv);
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break;
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case DREXDMA_DMA_START:
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return dma_start(drexpcie_priv);
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break;
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case DREXDMA_DMA_STOP:
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return dma_stop(drexpcie_priv);
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break;
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case DREXDMA_SET_NUM_BUFS:
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drexpcie_priv->num_bufs = drexpcie_ioctl.value;
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break;
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case DREXDMA_SET_NUM_BYTES:
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drexpcie_priv->num_bytes = drexpcie_ioctl.value;
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break;
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case DREXDMA_GET_NUM_BUFS:
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drexpcie_ioctl.value = drexpcie_priv->num_bufs;
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if (copy_to_user((drexpcie_ioctl_t *)arg, &drexpcie_ioctl, sizeof(drexpcie_ioctl_t))) {
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return -EACCES;
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}
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break;
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case DREXDMA_GET_NUM_BYTES:
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drexpcie_ioctl.value = drexpcie_priv->num_bytes;
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if (copy_to_user((drexpcie_ioctl_t *)arg, &drexpcie_ioctl, sizeof(drexpcie_ioctl_t))) {
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return -EACCES;
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}
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break;
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case DREXDMA_GET_FREE_BUFS:
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drexpcie_ioctl.value = ioread32(drexpcie_priv->base_mem + DREXDMA_OFFSET_STAT + 0x8);
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if (copy_to_user((drexpcie_ioctl_t *)arg, &drexpcie_ioctl, sizeof(drexpcie_ioctl_t))) {
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return -EACCES;
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}
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break;
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default:
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printk("drexpcie[%d]: error, invalid IOCTL cmd\n", drexpcie_priv->chnum);
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return -EINVAL;
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}
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return 0;
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}
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static ssize_t drexpcie_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
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{
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struct drexpcie_device_priv* drexpcie_priv = file->private_data;
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uint32_t temp[3];
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uint32_t dma_index;
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// read status register to determine is something is in the complete queue
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temp[0] = ioread32(drexpcie_priv->base_mem + DREXDMA_OFFSET_STAT+0xC);
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// if bit 0 is high, FIFO is empty return 0 count value;
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if (temp[0] & 0x01) {
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count = 0;
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}
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// else read 72 bit FIFO value; value is popped after MSW read;
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else {
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temp[0] = ioread32(drexpcie_priv->base_mem + DREXDMA_OFFSET_FIFO);
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// temp[1] = ioread32(drexpcie_priv->base_mem + DREXDMA_OFFSET_FIFO+4);
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temp[2] = ioread32(drexpcie_priv->base_mem + DREXDMA_OFFSET_FIFO+8);
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// determine which buffer index;
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dma_index = temp[0] & 0x000001FF;
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// determine amount of data in buffer;
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count = (temp[0] & 0xFFFFFE00) >> 9;
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//using dma_index, copy correct buffer to user space
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if (copy_to_user(buf, drexpcie_priv->bufPtr[dma_index], count)) {
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count = 0;
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}
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// create new LSW using index and size
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temp[0] = (((drexpcie_priv->num_bytes) & 0x7FFFFF) << 9);
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temp[0] |= (((dma_index) & 0x000001FF));
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// write now unused buffer back to the available queue
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// If using loop mode dont need to write buffers back in
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// iowrite32(temp[0], drexpcie_priv->base_mem + DREXDMA_OFFSET_FIFO);
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// iowrite32(temp[1], drexpcie_priv->base_mem + DREXDMA_OFFSET_FIFO+4);
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// iowrite32(temp[2], drexpcie_priv->base_mem + DREXDMA_OFFSET_FIFO+8);
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}
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return count;
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}
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static ssize_t drexpcie_write(struct file *file, const char __user *buf, size_t count, loff_t *offset)
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{
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return count;
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}
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48
pcie_driver/drexchar.h
Executable file
48
pcie_driver/drexchar.h
Executable file
@@ -0,0 +1,48 @@
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#ifndef DREXCHAR_H
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#define DREXCHAR_H
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#include "drex.h"
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#define DREXDMA_DMA_INIT 0
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#define DREXDMA_DMA_CLEAR 1
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#define DREXDMA_DMA_START 2
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#define DREXDMA_DMA_STOP 3
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#define DREXDMA_SET_NUM_BUFS 4
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#define DREXDMA_SET_NUM_BYTES 5
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#define DREXDMA_GET_NUM_BUFS 6
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#define DREXDMA_GET_NUM_BYTES 7
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#define DREXDMA_GET_FREE_BUFS 8
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typedef struct {
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unsigned int cmd;
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unsigned int offset;
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unsigned int value;
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} drexpcie_ioctl_t;
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struct drexpcie_device_priv {
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uint8_t chnum;
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struct drexpcie_driver_priv* driv_priv;
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uint32_t type;
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u8 __iomem *base_mem;
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// Parameters used to allocate dma buffers
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uint32_t num_bufs;
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uint32_t valid_bufs;
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uint32_t num_bytes;
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// Physical memory address returned by dma_alloc_coherent
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dma_addr_t *dmaPtr;
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// Virtual memory address returned by dma_alloc_coherent
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void **bufPtr;
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};
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int drexpcie_chardev_create(struct drexpcie_driver_priv *driv_priv);
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int drexpcie_chardev_destroy(void);
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#endif
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158
pcie_driver/drexdma.c
Executable file
158
pcie_driver/drexdma.c
Executable file
@@ -0,0 +1,158 @@
|
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#include <linux/cdev.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
|
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#include <linux/slab.h>
|
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#include <linux/uaccess.h>
|
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#include <linux/fs.h>
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#include <linux/dma-mapping.h>
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#include "drexdma.h"
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// Initial DMA buffers function
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int init_dma_buffers(struct drexpcie_device_priv *drexpcie_priv)
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{
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int buffer_index;
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// allocate an array for the buffer pointers (kernel space)
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drexpcie_priv->bufPtr = kzalloc(drexpcie_priv->num_bufs*sizeof(void *),GFP_KERNEL);
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if (drexpcie_priv->bufPtr == NULL) {
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printk("drexpcie[%d]: error, failed to alloc bufPtr memory\n", drexpcie_priv->chnum);
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return -ENOMEM;
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}
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// allocate an array for the dma pointers (physical address)
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drexpcie_priv->dmaPtr = kzalloc(drexpcie_priv->num_bufs*sizeof(dma_addr_t),GFP_KERNEL);
|
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if (drexpcie_priv->dmaPtr == NULL) {
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printk("drexpcie[%d]: error, failed to alloc dmaPtr memory\n", drexpcie_priv->chnum);
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return -ENOMEM;
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}
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// loop through the total number of desired buffer and attempt to allocate;
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// This will populate both the bufPtr and dmaPtr
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for (buffer_index = 0; buffer_index < drexpcie_priv->num_bufs; buffer_index++) {
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drexpcie_priv->bufPtr[buffer_index] = dma_alloc_coherent(&(drexpcie_priv->driv_priv->pdev->dev), drexpcie_priv->num_bytes, &drexpcie_priv->dmaPtr[buffer_index], GFP_KERNEL);
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printk("Allocating Memory: %p, %llX\n",drexpcie_priv->bufPtr[buffer_index],drexpcie_priv->dmaPtr[buffer_index]);
|
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if (drexpcie_priv->bufPtr[buffer_index] == NULL) {
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printk("drexpcie[%d]: warning, DMA mem allocation failed at %d buffers\n", drexpcie_priv->chnum, buffer_index);
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break;
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}
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}
|
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|
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drexpcie_priv->valid_bufs = buffer_index;
|
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|
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return 0;
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}
|
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|
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// Release (free) DMA buffers function
|
||||
void release_dma_buffers(struct drexpcie_device_priv *drexpcie_priv)
|
||||
{
|
||||
int buffer_index;
|
||||
|
||||
if (drexpcie_priv->bufPtr) {
|
||||
for (buffer_index=0; buffer_index<drexpcie_priv->valid_bufs; buffer_index++) {
|
||||
if (drexpcie_priv->bufPtr[buffer_index]) {
|
||||
printk("Freeing Memory: %p, %llX\n",drexpcie_priv->bufPtr[buffer_index],drexpcie_priv->dmaPtr[buffer_index]);
|
||||
dma_free_coherent(&(drexpcie_priv->driv_priv->pdev->dev), drexpcie_priv->num_bytes , drexpcie_priv->bufPtr[buffer_index], drexpcie_priv->dmaPtr[buffer_index]);
|
||||
|
||||
// This is unnecessary, but cleaner
|
||||
drexpcie_priv->bufPtr[buffer_index] = NULL;
|
||||
drexpcie_priv->dmaPtr[buffer_index] = (dma_addr_t) NULL;
|
||||
}
|
||||
}
|
||||
kfree(drexpcie_priv->bufPtr);
|
||||
drexpcie_priv->bufPtr = NULL;
|
||||
}
|
||||
|
||||
if (drexpcie_priv->dmaPtr) {
|
||||
kfree(drexpcie_priv->dmaPtr);
|
||||
drexpcie_priv->dmaPtr = NULL;
|
||||
}
|
||||
|
||||
drexpcie_priv->valid_bufs = 0;
|
||||
|
||||
}
|
||||
|
||||
// Start the DMA function
|
||||
int dma_init(struct drexpcie_device_priv *drexpcie_priv)
|
||||
{
|
||||
int i;
|
||||
int ret;
|
||||
uint32_t temp[3];
|
||||
uint64_t temp64;
|
||||
|
||||
// set reset bits
|
||||
iowrite32(0x00000007, drexpcie_priv->base_mem+DREXDMA_OFFSET_CTRL);
|
||||
|
||||
// clears queues if dma_start is called multiple times.
|
||||
release_dma_buffers(drexpcie_priv);
|
||||
|
||||
ret = init_dma_buffers(drexpcie_priv);
|
||||
|
||||
if (ret) {
|
||||
release_dma_buffers(drexpcie_priv);
|
||||
return ret;
|
||||
}
|
||||
|
||||
// clear reset bits
|
||||
iowrite32(0x00000000, drexpcie_priv->base_mem+DREXDMA_OFFSET_CTRL);
|
||||
|
||||
// writes buffer to the available FIFO
|
||||
printk("drexpcie[%d]: writing %d buffers to FIFO\n", drexpcie_priv->chnum, drexpcie_priv->valid_bufs );
|
||||
for (i = 0; i < drexpcie_priv->valid_bufs; i++) {
|
||||
temp64 = drexpcie_priv->dmaPtr[i];
|
||||
temp[0] = (((drexpcie_priv->num_bytes) & 0x7FFFFF) << 9);
|
||||
temp[0] |= (((i) & 0x000001FF));
|
||||
temp[1] = temp64 & 0xFFFFFFFF;
|
||||
temp[2] = (temp64 >> 32) & 0x000000FF;
|
||||
|
||||
printk("drexpcie[%d]: writing %x %x %x to FIFO\n", drexpcie_priv->chnum, temp[2],temp[1],temp[0]);
|
||||
iowrite32(temp[0], drexpcie_priv->base_mem+DREXDMA_OFFSET_FIFO);
|
||||
iowrite32(temp[1], drexpcie_priv->base_mem+DREXDMA_OFFSET_FIFO+4);
|
||||
iowrite32(temp[2], drexpcie_priv->base_mem+DREXDMA_OFFSET_FIFO+8);
|
||||
}
|
||||
|
||||
// Enable Loop Mode
|
||||
printk("drexpcie[%d]: enabling loop mode\n", drexpcie_priv->chnum);
|
||||
iowrite32(1, drexpcie_priv->base_mem+DREXDMA_OFFSET_CTRL+4);
|
||||
|
||||
// Enable DMA Engine
|
||||
// iowrite32(0x00000100, drexpcie_privDREXDMA_OFFSET_CTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dma_clear(struct drexpcie_device_priv *drexpcie_priv)
|
||||
{
|
||||
|
||||
// set reset bits
|
||||
iowrite32(0x00000007, drexpcie_priv->base_mem+DREXDMA_OFFSET_CTRL);
|
||||
|
||||
// Disable Loop Mode
|
||||
iowrite32(0, drexpcie_priv->base_mem+DREXDMA_OFFSET_CTRL+4);
|
||||
|
||||
release_dma_buffers(drexpcie_priv);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dma_start(struct drexpcie_device_priv *drexpcie_priv)
|
||||
{
|
||||
|
||||
// Enable DMA Engine
|
||||
iowrite32(0x00000100, drexpcie_priv->base_mem+DREXDMA_OFFSET_CTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dma_stop(struct drexpcie_device_priv *drexpcie_priv)
|
||||
{
|
||||
|
||||
// Disable DMA Engine
|
||||
iowrite32(0x00000000, drexpcie_priv->base_mem+DREXDMA_OFFSET_CTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
20
pcie_driver/drexdma.h
Executable file
20
pcie_driver/drexdma.h
Executable file
@@ -0,0 +1,20 @@
|
||||
|
||||
#ifndef DREXDMA_H
|
||||
#define DREXDMA_H
|
||||
|
||||
#include "drexchar.h"
|
||||
|
||||
#define DREXDMA_OFFSET_CTRL 0x00
|
||||
#define DREXDMA_OFFSET_STAT 0x10
|
||||
#define DREXDMA_OFFSET_FIFO 0x20
|
||||
|
||||
int init_dma_buffers(struct drexpcie_device_priv *drexpcie_priv);
|
||||
void release_dma_buffers(struct drexpcie_device_priv *drexpcie_priv);
|
||||
|
||||
int dma_init(struct drexpcie_device_priv *drexpcie_priv);
|
||||
int dma_clear(struct drexpcie_device_priv *drexpcie_priv);
|
||||
int dma_start(struct drexpcie_device_priv *drexpcie_priv);
|
||||
int dma_stop(struct drexpcie_device_priv *drexpcie_priv);
|
||||
|
||||
|
||||
#endif
|
||||
189
pcie_driver/drexpcie.c
Executable file
189
pcie_driver/drexpcie.c
Executable file
@@ -0,0 +1,189 @@
|
||||
|
||||
#include "drex.h"
|
||||
#include "drexchar.h"
|
||||
|
||||
#define DRIVER_NAME "drexpcie"
|
||||
|
||||
/* This sample driver supports device with VID = 0x010F, and PID = 0x0F0E*/
|
||||
static struct pci_device_id drexpcie_driver_id_table[] = {
|
||||
{ PCI_DEVICE(0x10EE, 0x903F) },
|
||||
{0,}
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(pci, drexpcie_driver_id_table);
|
||||
|
||||
static int drexpcie_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
|
||||
static void drexpcie_driver_remove(struct pci_dev *pdev);
|
||||
|
||||
/* Driver registration structure */
|
||||
static struct pci_driver drexpcie_driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.id_table = drexpcie_driver_id_table,
|
||||
.probe = drexpcie_driver_probe,
|
||||
.remove = drexpcie_driver_remove
|
||||
};
|
||||
|
||||
|
||||
static int __init drexpcie_driver_init(void)
|
||||
{
|
||||
/* Register new PCI driver */
|
||||
int result = pci_register_driver(&drexpcie_driver);
|
||||
if (result < 0) {
|
||||
// This print will tell you exactly why it failed
|
||||
pr_err("pci_register_driver failed with error: %d\n", result);
|
||||
return result;
|
||||
}
|
||||
|
||||
pr_info("Xilinx custom driver registered successfully!\n");
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static void __exit drexpcie_driver_exit(void)
|
||||
{
|
||||
/* Unregister */
|
||||
pci_unregister_driver(&drexpcie_driver);
|
||||
}
|
||||
|
||||
void release_device(struct pci_dev *pdev)
|
||||
{
|
||||
/* Disable IRQ #42*/
|
||||
// free_irq(42, pdev);
|
||||
/* Free memory region */
|
||||
pci_release_region(pdev, pci_select_bars(pdev, IORESOURCE_MEM));
|
||||
/* And disable device */
|
||||
pci_disable_device(pdev);
|
||||
}
|
||||
|
||||
/* */
|
||||
|
||||
static irqreturn_t irq_handler(int irq, void *cookie)
|
||||
{
|
||||
(void) cookie;
|
||||
printk("Handle IRQ #%d\n", irq);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/* Reqest interrupt and setup handler */
|
||||
int set_interrupts(struct pci_dev *pdev)
|
||||
{
|
||||
/* We want MSI interrupt, 3 lines (just an example) */
|
||||
int ret = pci_alloc_irq_vectors(pdev, 3, 3, PCI_IRQ_MSI);
|
||||
|
||||
if (ret < 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Request IRQ #42 */
|
||||
return request_threaded_irq(42, irq_handler, NULL, 0, "TEST IRQ", pdev);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* This function is called by the kernel */
|
||||
static int drexpcie_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
{
|
||||
int bar, err;
|
||||
u16 vendor, device;
|
||||
// unsigned long mmio_start,mmio_len;
|
||||
struct drexpcie_driver_priv *drv_priv;
|
||||
|
||||
printk("drexpcie probe\n");
|
||||
|
||||
/* Let's read data from the PCI device configuration registers */
|
||||
pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
|
||||
pci_read_config_word(pdev, PCI_DEVICE_ID, &device);
|
||||
|
||||
printk(KERN_INFO "Device vid: 0x%X pid: 0x%X\n", vendor, device);
|
||||
|
||||
/* Request IO BAR */
|
||||
bar = pci_select_bars(pdev, IORESOURCE_MEM);
|
||||
|
||||
/* Enable device memory */
|
||||
err = pci_enable_device_mem(pdev);
|
||||
|
||||
if (err) {
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Request memory region for the BAR */
|
||||
err = pci_request_region(pdev, bar, DRIVER_NAME);
|
||||
|
||||
if (err) {
|
||||
pci_disable_device(pdev);
|
||||
return err;
|
||||
}
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
if (dma_set_mask_and_coherent(&(pdev->dev), DMA_BIT_MASK(40))) {
|
||||
printk("dma_set_mask_and_coherent error\n");
|
||||
}
|
||||
|
||||
/* Allocate memory for the driver private data */
|
||||
drv_priv = kzalloc(sizeof(struct drexpcie_driver_priv), GFP_KERNEL);
|
||||
|
||||
if (!drv_priv) {
|
||||
release_device(pdev);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
drv_priv->pdev = pdev;
|
||||
|
||||
/* Get start and stop memory offsets */
|
||||
drv_priv->mem_start = pci_resource_start(pdev, 0);
|
||||
drv_priv->mem_len = pci_resource_len(pdev, 0);
|
||||
|
||||
printk(KERN_INFO "Resource Start: 0x%lX length: 0x%lX\n", drv_priv->mem_start, drv_priv->mem_len);
|
||||
|
||||
/* Remap BAR to the local pointer */
|
||||
drv_priv->bar0_mem = ioremap(drv_priv->mem_start, drv_priv->mem_len);
|
||||
|
||||
if (!drv_priv->bar0_mem) {
|
||||
release_device(pdev);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
drexpcie_chardev_create(drv_priv);
|
||||
|
||||
/* Set driver private data */
|
||||
/* Now we can access mapped "bar0_mem" from the any driver's function */
|
||||
pci_set_drvdata(pdev, drv_priv);
|
||||
|
||||
return 0;
|
||||
|
||||
// return set_interrupts(pdev);
|
||||
}
|
||||
|
||||
/* Clean up */
|
||||
static void drexpcie_driver_remove(struct pci_dev *pdev)
|
||||
{
|
||||
struct drexpcie_driver_priv *drv_priv = pci_get_drvdata(pdev);
|
||||
|
||||
drexpcie_chardev_destroy();
|
||||
|
||||
if (drv_priv) {
|
||||
if (drv_priv->bar0_mem) {
|
||||
iounmap(drv_priv->bar0_mem);
|
||||
}
|
||||
|
||||
pci_free_irq_vectors(pdev);
|
||||
|
||||
kfree(drv_priv);
|
||||
pci_set_drvdata(pdev, NULL);
|
||||
}
|
||||
|
||||
// release_device(pdev);
|
||||
pci_release_region(pdev, 0);
|
||||
pci_disable_device(pdev);
|
||||
|
||||
}
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("");
|
||||
MODULE_DESCRIPTION("DREX PCIe driver");
|
||||
MODULE_VERSION("0.1");
|
||||
|
||||
module_init(drexpcie_driver_init);
|
||||
module_exit(drexpcie_driver_exit);
|
||||
|
||||
Reference in New Issue
Block a user