bkiedinger/castelion_radar_alinx_kintex
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last update to chris

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bkiedinger@gmail.com
2025-05-29 20:47:32 -05:00
parent 7f2dd0103e
commit 6e4aa1230a
19 changed files with 96 additions and 84 deletions
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2
vitis/radar/radar.prj
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@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="ASCII"?>
<sdkproject:SdkProject xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:sdkproject="http://www.xilinx.com/sdkproject" name="radar" location="/home/bkiedinger/projects/castelion/radar_alinx_kintex/vitis/radar" platform="/home/bkiedinger/projects/castelion/radar_alinx_kintex/vitis/top/export/top/top.xpfm" platformUID="xilinx:::0.0(custom)" systemProject="radar_system" sysConfig="top" runtime="C/C++" cpu="freertos10_xilinx_microblaze_0" cpuInstance="microblaze_0" os="freertos10_xilinx" mssSignature="31c4a066f121f9dfdf4b2a6e46d178c9">
<sdkproject:SdkProject xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:sdkproject="http://www.xilinx.com/sdkproject" name="radar" location="/home/bkiedinger/projects/castelion/radar_alinx_kintex/vitis/radar" platform="/home/bkiedinger/projects/castelion/radar_alinx_kintex/vitis/top/export/top/top.xpfm" platformUID="xilinx:::0.0(custom)" systemProject="radar_system" sysConfig="top" runtime="C/C++" cpu="freertos10_xilinx_microblaze_0" cpuInstance="microblaze_0" os="freertos10_xilinx" mssSignature="b81ac1744f29e93881cfaa8e8b019a98">
<configuration name="Debug" id="xilinx.gnu.mb.exe.debug.245787499">
<configBuildOptions xsi:type="sdkproject:SdkOptions"/>
<lastBuildOptions xsi:type="sdkproject:SdkOptions"/>

32
vitis/radar/src/data_converter_setup.c
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@@ -525,23 +525,23 @@ void setup_data_converter() {
#ifndef IBERT_TESTING
// Update FPGA TX Transceiver settings
set_lane_cal(0, 0, 0, 11);
set_lane_cal(1, 10, 5, 11);
set_lane_cal(2, 5, 0, 11);
set_lane_cal(3, 0, 0, 11);
set_lane_cal(4, 0, 0, 11);
set_lane_cal(5, 0, 0, 11);
set_lane_cal(6, 12, 0, 11);
set_lane_cal(7, 0, 0, 11);
// set_lane_cal(0, 0, 0, 11);
// set_lane_cal(1, 10, 5, 11);
// set_lane_cal(2, 5, 0, 11);
// set_lane_cal(3, 0, 0, 11);
// set_lane_cal(4, 0, 0, 11);
// set_lane_cal(5, 0, 0, 11);
// set_lane_cal(6, 12, 0, 11);
// set_lane_cal(7, 0, 0, 11);
// set_lane_cal(0, 9, 0, 7);
// set_lane_cal(1, 9, 0, 7);
// set_lane_cal(2, 9, 0, 7);
// set_lane_cal(3, 9, 0, 7);
// set_lane_cal(4, 9, 0, 7);
// set_lane_cal(5, 9, 0, 7);
// set_lane_cal(6, 9, 0, 7);
// set_lane_cal(7, 9, 0, 7);
set_lane_cal(0, 9, 0, 7);
set_lane_cal(1, 9, 0, 7);
set_lane_cal(2, 9, 0, 7);
set_lane_cal(3, 9, 0, 7);
set_lane_cal(4, 9, 0, 7);
set_lane_cal(5, 9, 0, 7);
set_lane_cal(6, 9, 0, 7);
set_lane_cal(7, 9, 0, 7);
vTaskDelay(100);
int subclass = jtx_param[uc][0].jesd_subclass;