fixed pinout, made some updates for discrete timing pulses, needs to be tested
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@@ -35,7 +35,7 @@ set_property IOSTANDARD DIFF_SSTL12 [get_ports clk_200_n]
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#-------------------------------------------
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# RF Attenautors
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#-------------------------------------------
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set_property PACKAGE_PIN G26 [get_ports tx0_rf_attn_sin]
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set_property PACKAGE_PIN G25 [get_ports tx0_rf_attn_sin]
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set_property PACKAGE_PIN H26 [get_ports tx0_rf_attn_clk]
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set_property PACKAGE_PIN J26 [get_ports tx0_rf_attn_le]
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set_property PACKAGE_PIN L25 [get_ports tx1_rf_attn_sin]
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