303 lines
9.4 KiB
Python
Executable File
303 lines
9.4 KiB
Python
Executable File
import ctypes
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import datetime
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import ipaddress
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import socket
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import struct
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import time
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import numpy as np
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import data_structures as msg_types
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from data_structures import CpiHeader
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TIMING_ENGINE_ADDR = 0x40051000
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DIG_RX_ADDR = 0x20000000
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DIG_RX_STRIDE = 0x10000
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WAVEFORM_GEN_ADDR = 0x40053000
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NUM_RX = 2
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def form_chirp(pulsewidth, bw, sample_rate, win=None, ):
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n = int(np.round(pulsewidth * sample_rate))
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d_t = 1 / sample_rate
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f = np.linspace(-bw/2, bw/2, n)
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phi = np.cumsum(2 * np.pi * f * d_t)
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x = np.exp(-1j * phi)
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return x.astype(np.complex64)
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class RadarManager:
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def __init__(self,
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host="192.168.1.200",
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port=5001):
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self.host = host
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self.port = port
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self.s = None
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self.CONNECTED = False
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self.connect()
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# Update UDP packet size
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self.packet_size = 4096
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self.axi_write_register(0x4005001C, self.packet_size)
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self.reset_10g_udp()
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self.stop_running()
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def connect(self):
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self.CONNECTED = False
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retry_cnt = 0
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while True:
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try:
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self.s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
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self.s.settimeout(5)
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self.s.connect((self.host, self.port))
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self.s.setsockopt(socket.IPPROTO_TCP, socket.TCP_NODELAY, 1)
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self.s.settimeout(5)
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self.CONNECTED = True
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break
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except socket.error as e:
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print("Connection Error %s" % e)
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# print("Connection Timeout, trying again %d" % retry_cnt)
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self.CONNECTED = False
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retry_cnt += 1
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if retry_cnt >= 1:
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break
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return self.CONNECTED
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def disconnect(self):
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self.s.close()
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self.CONNECTED = False
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def is_connected(self):
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return self.CONNECTED
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def send_bytes(self, msg_bytes):
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self.s.sendall(msg_bytes)
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def send_message(self, msg, update_hdr=True, enable_ack=True, wait_for_ack=True, timeout=10):
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self.s.settimeout(timeout)
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ret = True
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msg.header.flags = 0
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# Request a completion ACK
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if enable_ack:
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msg.header.flags = msg_types.HDR_FLAG_REQ_ACK
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# Serialize message and send
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self.send_bytes(bytes(msg))
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# Need to wait for response
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if wait_for_ack:
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recv_bytes, err = self.get_response(ctypes.sizeof(msg_types.AckType))
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resp = msg_types.AckType.from_buffer_copy(recv_bytes)
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ret = True
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return ret
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def get_response(self, size):
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recv_data = bytearray()
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while len(recv_data) < size:
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try:
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recv_data += self.s.recv(size, 0)
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except socket.timeout as e:
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return 0, -1
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return recv_data, 0
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def axi_write_register(self, address, data):
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# Make sure address is word aligned
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address -= (address % 4)
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# Form message
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msg = msg_types.WriteRegType()
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msg.address = address
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msg.data = data
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self.send_message(msg)
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return
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def axi_write_register_burst(self, address, data):
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# Make sure address is word aligned
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address -= (address % 4)
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# Form message
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msg = msg_types.WriteRegBurstType()
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msg.address = address
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msg.length = len(data)
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for i in range(len(data)):
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msg.data[i] = data[i]
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self.send_message(msg)
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return
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def axi_read_register(self, address):
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# Make sure address is word aligned
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address -= (address % 4)
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# Form message
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msg = msg_types.ReadRequestType()
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msg.address = address
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self.send_message(msg, enable_ack=False, wait_for_ack=False)
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# Get response
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recv_bytes, _ = self.get_response(ctypes.sizeof(msg_types.ReadResponseType))
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resp = msg_types.ReadResponseType.from_buffer_copy(recv_bytes)
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return resp.data
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def set_dac_nco(self, channel, frequency):
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# Form message
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msg = msg_types.DacNcoConfigType()
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msg.channel = channel
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msg.frequency = frequency
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self.send_message(msg)
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return
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def set_adc_nco(self, channel, frequency):
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# Form message
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msg = msg_types.AdcNcoConfigType()
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msg.channel = channel
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msg.frequency = frequency
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self.send_message(msg)
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return
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def rf_spi_write(self, dev_sel, num_bits, data):
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# Form message
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msg = msg_types.RfSpiWriteType()
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msg.dev_sel = dev_sel
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msg.num_bits = num_bits
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msg.data = data
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self.send_message(msg)
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return
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def load_waveform(self, ch, amp, bw, pw):
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addr = 0x0010000 + 0x0010000 * ch
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print('Load', hex(addr))
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num_samples = pw
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wf = form_chirp(pw, bw, 1)
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wf = wf * amp
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bram_address = addr
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iq = wf * 0x7FFF
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iq_real = iq.real.astype(np.uint16)
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iq_imag = iq.imag.astype(np.uint16)
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iq_real = iq_real.astype(np.uint32)
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iq_imag = iq_imag.astype(np.uint32)
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data = iq_real | (iq_imag << 16)
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num_bursts = num_samples / msg_types.MAX_BURST_LENGTH
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num_bursts = int(np.ceil(num_bursts))
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for i in range(num_bursts):
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start_ind = i * msg_types.MAX_BURST_LENGTH
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stop_ind = start_ind + msg_types.MAX_BURST_LENGTH
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stop_ind = min(stop_ind, num_samples)
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burst_data = data[start_ind:stop_ind]
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self.axi_write_register_burst(bram_address + i * 4 * msg_types.MAX_BURST_LENGTH, burst_data)
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def reset_10g_udp(self):
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val = self.axi_read_register(0x40050008)
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self.axi_write_register(0x40050008, val | (1 << 15))
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self.axi_write_register(0x40050008, val)
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time.sleep(2)
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def setup_cpi_header(self, pri, inter_cpi, num_pulses, num_samples, start_sample,
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tx_num_samples, tx_start_sample, rx_lo_offset, tx_lo_offset):
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# Load Up header BRAM
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header = CpiHeader()
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header.sync = 0xAABBCCDD
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header.num_pulses = num_pulses
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header.num_samples = num_samples
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header.start_sample = start_sample
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header.tx_num_samples = tx_num_samples
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header.tx_start_sample = tx_start_sample
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header.pri = pri
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header.inter_cpi = inter_cpi
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header.tx_lo_offset = tx_lo_offset
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header.rx_lo_offset = rx_lo_offset
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data = np.frombuffer(bytes(header), dtype=np.uint32)
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self.axi_write_register_burst(TIMING_ENGINE_ADDR + 0xC00, data)
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def setup_timing_engine(self, pri, num_pulses, inter_cpi):
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self.axi_write_register(TIMING_ENGINE_ADDR + 0x4, pri - 1)
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self.axi_write_register(TIMING_ENGINE_ADDR + 0x8, num_pulses)
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self.axi_write_register(TIMING_ENGINE_ADDR + 0x10, inter_cpi - 1)
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def setup_rx(self, num_samples, start_sample):
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for i in range(NUM_RX):
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self.axi_write_register(DIG_RX_ADDR + i*DIG_RX_STRIDE + 0x4, num_samples >> 2)
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self.axi_write_register(DIG_RX_ADDR + i*DIG_RX_STRIDE + 0x8, start_sample >> 2)
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def setup_tx(self, num_samples, start_sample):
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self.axi_write_register(WAVEFORM_GEN_ADDR + 0x4, num_samples >> 2)
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self.axi_write_register(WAVEFORM_GEN_ADDR + 0x8, start_sample >> 2)
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def start_running(self):
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for i in range(NUM_RX):
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self.axi_write_register(DIG_RX_ADDR + i*DIG_RX_STRIDE + 0x0, 0) # RX Reset
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self.axi_write_register(WAVEFORM_GEN_ADDR + 0x0, 0) # TX Reset
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self.axi_write_register(TIMING_ENGINE_ADDR + 0x0, 0) # Timing Reset (do this last)
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def stop_running(self):
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self.axi_write_register(TIMING_ENGINE_ADDR + 0x0, 1) # Timing Engine Reset
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for i in range(NUM_RX):
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self.axi_write_register(DIG_RX_ADDR + i*DIG_RX_STRIDE + 0x0, 1) # RX Reset
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self.axi_write_register(WAVEFORM_GEN_ADDR + 0x0, 1) # TX Reset
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def setup_rf_attenuators(self, rf_atten):
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self.rf_spi_write(0, 6, rf_atten[0]) # TX0 RF (ADRF5730)
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self.rf_spi_write(1, 6, rf_atten[1]) # TX1 RF (ADRF5730)
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self.rf_spi_write(2, 6, rf_atten[2]) # RX0 RF (ADRF5721)
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self.rf_spi_write(3, 6, rf_atten[3]) # RX0 IF (HMC624)
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self.rf_spi_write(4, 6, rf_atten[4]) # RX1 RF (ADRF5721)
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self.rf_spi_write(5, 6, rf_atten[5]) # RX1 IF (HMC624)
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def configure_cpi(self, pri, inter_cpi, num_pulses, num_samples, start_sample,
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tx_num_samples, tx_start_sample, rx_lo_offset, tx_lo_offset):
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self.load_waveform(0, 1, 0.1, tx_num_samples)
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self.load_waveform(1, 1, 0.1, tx_num_samples)
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rf_atten = [1, 2, 3, 4, 5, 6]
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self.setup_rf_attenuators(rf_atten)
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# DAC at 5.25 GHz is in second nyquist
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# ADC would be in 3rd nyquist
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lo = 5.25e9
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f_dac = 9e9
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f_adc = 3e9
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tx_lo = 5.25e9 % f_dac
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rx_lo = 5.25e9 % f_adc
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for i in range(4):
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self.set_adc_nco(i, rx_lo)
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self.set_dac_nco(0, tx_lo)
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self.set_dac_nco(1, tx_lo)
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self.set_dac_nco(2, tx_lo + tx_lo_offset)
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self.set_dac_nco(3, tx_lo + rx_lo_offset)
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self.setup_timing_engine(pri, num_pulses, inter_cpi)
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self.setup_rx(num_samples, start_sample)
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self.setup_tx(tx_num_samples, tx_start_sample)
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self.setup_cpi_header(pri, inter_cpi, num_pulses, num_samples, start_sample,
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tx_num_samples, tx_start_sample, rx_lo_offset, tx_lo_offset) |