4 rx channels and 16 lane PCIe working on drex card
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@@ -8,9 +8,13 @@
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#include <string>
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#include <queue>
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#define UTIL_REG_BASE 0x100000
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#define TIMING_REG_BASE 0x110000
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#define DATA_GEN_REG_BASE 0x120000
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// #define UTIL_REG_BASE 0x100000
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// #define TIMING_REG_BASE 0x110000
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// #define DATA_GEN_REG_BASE 0x120000
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#define UTIL_REG_BASE 0x10000
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#define TIMING_REG_BASE 0x20000
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#define DATA_GEN_REG_BASE 0x30000
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#define WSRDMA_DMA_INIT 0
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#define WSRDMA_DMA_CLEAR 1
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@@ -20,8 +20,8 @@ int main() {
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// Setup Timing Engine and data generator to test
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uint32_t n_pulses = 128;
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float inter_cpi = 100e-6;
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float pri = 84e-6;
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uint32_t n_samples = 8192;
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float pri = 70e-6;
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uint32_t n_samples = 16384;
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// float pri = 40e-6;
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// uint32_t n_samples = 4096;
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