bkiedinger/castelion_radar_alinx_kintex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

not sure why build isnt working for chris

Browse Source
This commit is contained in:
bkiedinger@gmail.com
2025-08-01 17:45:26 -05:00
parent 707e9f82a4
commit 3648531294
14 changed files with 81 additions and 54 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
radar_alinx_kintex.srcs/constrs_1/new/constraints.xdc
View File

@@ -283,11 +283,11 @@ create_clock -period 5.333 -name jesd_qpll_refclk [get_ports jesd_qpll0_refclk_p
#set_property PACKAGE_PIN P6 [get_ports jesd_qpll0_refclk_p]
# Works with the board at my house
#set_property PACKAGE_PIN G10 [get_ports jesd_core_clk_p]
#set_property PACKAGE_PIN F10 [get_ports jesd_core_clk_n]
set_property PACKAGE_PIN G10 [get_ports jesd_core_clk_p]
set_property PACKAGE_PIN F10 [get_ports jesd_core_clk_n]
# Works with the board Chris has (broken USB UART)
set_property PACKAGE_PIN D24 [get_ports jesd_core_clk_p]
set_property PACKAGE_PIN C24 [get_ports jesd_core_clk_n]
#set_property PACKAGE_PIN D24 [get_ports jesd_core_clk_p]
#set_property PACKAGE_PIN C24 [get_ports jesd_core_clk_n]
set_property IOSTANDARD LVDS [get_ports jesd_core_clk_p]
set_property DQS_BIAS TRUE [get_ports jesd_core_clk_p]

BIN
radar_alinx_kintex.srcs/utils_1/imports/synth_1/top.dcp
View File

Binary file not shown.