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bkiedinger@gmail.com
2025-05-20 20:33:12 -05:00
parent 8a1a6ea770
commit fcb291590b
104 changed files with 63299 additions and 45045 deletions
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48
vitis/radar/_ide/bitstream/top.mmi
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@@ -13,49 +13,49 @@
<AddressSpace Name="microblaze_bd_i_microblaze_0.microblaze_bd_i_microblaze_0_local_memory_dlmb_bram_if_cntlr" Begin="0" End="32767">
<AddressSpaceRange Name="microblaze_bd_i_microblaze_0.microblaze_bd_i_microblaze_0_local_memory_dlmb_bram_if_cntlr" Begin="0" End="32767" CoreMemory_Width="0" MemoryType="RAM_SP" MemoryConfiguration="">
<BusBlock>
<BitLane MemType="RAMB36" Placement="X6Y46" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y9" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="7" LSB="4"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X5Y44" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y10" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="3" LSB="0"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X6Y44" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y14" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="15" LSB="12"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X6Y43" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y13" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="11" LSB="8"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X5Y46" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y6" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="23" LSB="20"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X5Y45" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y5" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="19" LSB="16"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X6Y45" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y11" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="31" LSB="28"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X6Y41" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X6Y7" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="27" LSB="24"/>
<AddressRange Begin="0" End="8191"/>
<BitLayout pattern=""/>
@@ -69,97 +69,97 @@
<AddressSpace Name="microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_microblaze_I.microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_dlmb_cntlr" Begin="0" End="65535">
<AddressSpaceRange Name="microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_microblaze_I.microblaze_bd_i_ddr4_0_inst_u_ddr4_mem_intfc_u_ddr_cal_riu_mcs0_inst_dlmb_cntlr" Begin="0" End="65535" CoreMemory_Width="0" MemoryType="RAM_SP" MemoryConfiguration="">
<BusBlock>
<BitLane MemType="RAMB36" Placement="X0Y9" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X2Y24" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="7" LSB="6"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X1Y7" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X2Y25" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="5" LSB="4"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X0Y11" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X1Y24" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="3" LSB="2"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X0Y14" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X1Y22" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="1" LSB="0"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X1Y6" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X0Y25" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="15" LSB="14"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X1Y5" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X0Y24" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="13" LSB="12"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X0Y7" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X1Y26" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="11" LSB="10"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X0Y6" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X1Y25" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="9" LSB="8"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X0Y13" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X1Y19" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="23" LSB="22"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X2Y13" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X2Y19" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="21" LSB="20"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X2Y10" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X1Y17" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="19" LSB="18"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X2Y9" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X0Y20" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="17" LSB="16"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X1Y13" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X2Y21" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="31" LSB="30"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X2Y12" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X0Y18" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="29" LSB="28"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X1Y14" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X0Y22" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="27" LSB="26"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>
<Parity ON="false" NumBits="0"/>
</BitLane>
<BitLane MemType="RAMB36" Placement="X2Y11" Read_Width="0" SLR_INDEX="-1">
<BitLane MemType="RAMB36" Placement="X1Y18" Read_Width="0" SLR_INDEX="-1">
<DataWidth MSB="25" LSB="24"/>
<AddressRange Begin="0" End="16383"/>
<BitLayout pattern=""/>

2
vitis/radar/_ide/hwspec.checksum
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@@ -1 +1 @@
2759812199
2843589716

2
vitis/radar/_ide/launch/Debugger_radar-Default.launch
View File

@@ -16,7 +16,7 @@
<stringAttribute key="com.xilinx.sdk.tcf.debug.uihw.bit.file" value="/home/bkiedinger/projects/castelion/radar_alinx_kintex/radar_alinx_kintex.runs/impl_1/top.bit"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uihw.init.tcl" value=""/>
<booleanAttribute key="com.xilinx.sdk.tcf.debug.uipl.powerup" value="false"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproc.appl.map" value="{&quot;microblaze_0&quot;:{&quot;xilinx.tcf.application&quot;:&quot;Debug/radar.elf&quot;,&quot;xilinx.tcf.datafiles&quot;:&quot;&quot;,&quot;xilinx.tcf.no_download&quot;:false,&quot;xilinx.tcf.profile_enabled&quot;:false,&quot;xilinx.tcf.profile_frequency&quot;:&quot;10000&quot;,&quot;xilinx.tcf.profile_non_int_frequency&quot;:&quot;150000000&quot;,&quot;xilinx.tcf.profile_non_int_high_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_low_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_use_count_instr&quot;:false,&quot;xilinx.tcf.profile_non_int_use_cumulate&quot;:false,&quot;xilinx.tcf.profile_non_intrusive_support&quot;:false,&quot;xilinx.tcf.profile_store_address&quot;:&quot;0x0&quot;,&quot;xilinx.tcf.profile_use_intrusive&quot;:false,&quot;xilinx.tcf.project&quot;:&quot;radar&quot;,&quot;xilinx.tcf.relocate&quot;:false,&quot;xilinx.tcf.relocate_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.reset&quot;:true,&quot;xilinx.tcf.stop_at_entry&quot;:false}}"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproc.appl.map" value="{&quot;microblaze_0&quot;:{&quot;xilinx.tcf.application&quot;:&quot;Debug/radar.elf&quot;,&quot;xilinx.tcf.datafiles&quot;:&quot;&quot;,&quot;xilinx.tcf.no_download&quot;:false,&quot;xilinx.tcf.profile_enabled&quot;:false,&quot;xilinx.tcf.profile_frequency&quot;:&quot;10000&quot;,&quot;xilinx.tcf.profile_non_int_frequency&quot;:&quot;125000000&quot;,&quot;xilinx.tcf.profile_non_int_high_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_low_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_use_count_instr&quot;:false,&quot;xilinx.tcf.profile_non_int_use_cumulate&quot;:false,&quot;xilinx.tcf.profile_non_intrusive_support&quot;:false,&quot;xilinx.tcf.profile_store_address&quot;:&quot;0x0&quot;,&quot;xilinx.tcf.profile_use_intrusive&quot;:false,&quot;xilinx.tcf.project&quot;:&quot;radar&quot;,&quot;xilinx.tcf.relocate&quot;:false,&quot;xilinx.tcf.relocate_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.reset&quot;:true,&quot;xilinx.tcf.stop_at_entry&quot;:false}}"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproc.selection" value="microblaze_0"/>
<booleanAttribute key="com.xilinx.sdk.tcf.debug.uiprogram.fpga" value="true"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproject.name" value="radar"/>

2
vitis/radar/_ide/launch/Debugger_radar-sw only.launch
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@@ -16,7 +16,7 @@
<stringAttribute key="com.xilinx.sdk.tcf.debug.uihw.bit.file" value="/home/bkiedinger/projects/castelion/radar_alinx_kintex/radar_alinx_kintex.runs/impl_1/top.bit"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uihw.init.tcl" value=""/>
<booleanAttribute key="com.xilinx.sdk.tcf.debug.uipl.powerup" value="false"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproc.appl.map" value="{&quot;microblaze_0&quot;:{&quot;xilinx.tcf.application&quot;:&quot;Debug/radar.elf&quot;,&quot;xilinx.tcf.datafiles&quot;:&quot;&quot;,&quot;xilinx.tcf.no_download&quot;:false,&quot;xilinx.tcf.profile_enabled&quot;:false,&quot;xilinx.tcf.profile_frequency&quot;:&quot;10000&quot;,&quot;xilinx.tcf.profile_non_int_frequency&quot;:&quot;150000000&quot;,&quot;xilinx.tcf.profile_non_int_high_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_low_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_use_count_instr&quot;:false,&quot;xilinx.tcf.profile_non_int_use_cumulate&quot;:false,&quot;xilinx.tcf.profile_non_intrusive_support&quot;:false,&quot;xilinx.tcf.profile_store_address&quot;:&quot;0x0&quot;,&quot;xilinx.tcf.profile_use_intrusive&quot;:false,&quot;xilinx.tcf.project&quot;:&quot;radar&quot;,&quot;xilinx.tcf.relocate&quot;:false,&quot;xilinx.tcf.relocate_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.reset&quot;:true,&quot;xilinx.tcf.stop_at_entry&quot;:false}}"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproc.appl.map" value="{&quot;microblaze_0&quot;:{&quot;xilinx.tcf.application&quot;:&quot;Debug/radar.elf&quot;,&quot;xilinx.tcf.datafiles&quot;:&quot;&quot;,&quot;xilinx.tcf.no_download&quot;:false,&quot;xilinx.tcf.profile_enabled&quot;:false,&quot;xilinx.tcf.profile_frequency&quot;:&quot;10000&quot;,&quot;xilinx.tcf.profile_non_int_frequency&quot;:&quot;125000000&quot;,&quot;xilinx.tcf.profile_non_int_high_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_low_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.profile_non_int_use_count_instr&quot;:false,&quot;xilinx.tcf.profile_non_int_use_cumulate&quot;:false,&quot;xilinx.tcf.profile_non_intrusive_support&quot;:false,&quot;xilinx.tcf.profile_store_address&quot;:&quot;0x0&quot;,&quot;xilinx.tcf.profile_use_intrusive&quot;:false,&quot;xilinx.tcf.project&quot;:&quot;radar&quot;,&quot;xilinx.tcf.relocate&quot;:false,&quot;xilinx.tcf.relocate_addr&quot;:&quot;&quot;,&quot;xilinx.tcf.reset&quot;:true,&quot;xilinx.tcf.stop_at_entry&quot;:false}}"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproc.selection" value="microblaze_0"/>
<booleanAttribute key="com.xilinx.sdk.tcf.debug.uiprogram.fpga" value="false"/>
<stringAttribute key="com.xilinx.sdk.tcf.debug.uiproject.name" value="radar"/>