bkiedinger/pcie_data_recorder
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
6 Commits 2 Branches 0 Tags
37ca65a65b7fe9740f6e34c7b0ef208a122bad54
T
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
bkiedinger 37ca65a65b updates
2026-06-13 17:02:22 -05:00
cpp
updates
2026-06-13 17:02:22 -05:00
project_1.srcs
4 rx channels and 16 lane PCIe working on drex card
2026-06-11 23:19:03 -05:00
project_1.xpr
4 rx channels and 16 lane PCIe working on drex card
2026-06-11 23:19:03 -05:00
top.xsa
first commit
2026-05-25 22:36:52 -05:00
S
Description
No description provided
15 MiB
Languages
VHDL 90.6%
Verilog 8.9%
SystemVerilog 0.4%