this build works at 9 GSPS DAC, 3 GSPS ADC, 750 MSPS IQ

This commit is contained in:
2025-04-25 06:26:07 -05:00
parent 729d034a13
commit 8a1a6ea770
30 changed files with 22794 additions and 22500 deletions

File diff suppressed because it is too large Load Diff

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@@ -10,11 +10,14 @@
# source /home/bkiedinger/projects/castelion/radar_alinx_kintex/vitis/radar_system/_ide/scripts/ibert.tcl
#
connect -url tcp:127.0.0.1:3121
targets -set -filter {jtag_cable_name =~ "Digilent JTAG-HS1 210512180081" && level==0 && jtag_device_ctx=="jsn-JTAG-HS1-210512180081-13822093-0"}
fpga -file /home/bkiedinger/projects/castelion/radar_alinx_kintex_ibert/radar_alinx_kintex.runs/impl_1/top.bit
targets -set -nocase -filter {name =~ "*microblaze*#0" && bscan=="USER2" }
loadhw -hw /home/bkiedinger/projects/castelion/radar_alinx_kintex/vitis/top/export/top/hw/top.xsa -regs
configparams mdm-detect-bscan-mask 2
targets -set -nocase -filter {name =~ "*microblaze*#0" && bscan=="USER2" }
rst -processor
rst -system
after 3000
targets -set -nocase -filter {name =~ "*microblaze*#0" && bscan=="USER2" }
dow /home/bkiedinger/projects/castelion/radar_alinx_kintex/vitis/radar/Debug/radar.elf
targets -set -nocase -filter {name =~ "*microblaze*#0" && bscan=="USER2" }